1. Field
The embodiments discussed herein are directed to an integrated circuit.
2. Description of the Related Art
A static random access memory (SRAM), a dynamic random access memory (DRAM), or the like is embedded in an integrated circuit in a computer system, such as, for example, a System on Chip (SoC), a processor, a digital signal processor (DSP), or a memory element. As the SoC is increasingly sophisticated, the capacity of the embedded memory is also increased. Then, the yield rate is determined by the quality of the embedded memory. Accordingly, a test circuit for automatically testing the embedded memory is embedded in the SoC.
The test of the memory embedded in the SoC has been disclosed, for example, in Japanese Laid-open Patent Application No. 2002-298598, Japanese Laid-Open Patent Application No. 2000-222899, Japanese Laid-Open Patent Application No. 2003-132696, and Japanese Laid-Open Patent Application No. H10-207695.